The job location can be Leuven or Ghent.

Scope

A senior mixed-signal verification engineer defines the mixed-signal verification and modeling methodology within ASICs developed by ICsense.

Responsibilities

• Define the ICsense methodology of mixed-signal verification and modeling together with the mixed-signal team
• Review and contribute to mixed-signal verification plans across projects
• Develop behavioral models for analog/mixed-signal building blocks
• Define and maintain verification strategy within ASIC development core teams across projects
• Set up mixed-signal verification platforms across projects
• Lead mixed-signal verification activity within projects
• Assist and train design engineers in real-number modeling tasks
• Perform evaluations of new tools/methods that can improve the methodology
• Interact with the CAD team to improve the flow
• Keep in touch with state-of-art developments within the market
• Communicate efficiently with the project team to successfully complete the project

Competences

• You have at least 5 years’ experience in AMS (analog/mixed-signal) modeling and are experienced mixed-signal simulators like Cadence Xcelium
• Knowledge of System Verilog Real-Number Modeling is a plus
• You have a good understanding of analog circuit behavior
• You have a good knowledge of Matlab and programming skills are an asset (e.g. Python)
• You have strong communication and reporting skills, also in English

Our offer

• The job location can be Leuven or Ghent
• An attractive salary package with a variety of extra benefits
• A stimulating and pleasant working environment with regular team activities
• A financially healthy company with growth potential
• Possibility to continuously learn and grow through in-house and external trainings