Design environment
ICsense has developed a unique design environment for high-quality analog and digital design in a structured way, resulting in a high reliability and high first-time-right success rate.
Industry-standard EDA tools
| Modelling | Block level |
Top level |
Mixed-mode | Digital |
| Verilog-A | Spectre | Ultrasim | AMS (+ Spectre) | Verilog |
| Verilog-AMS | SpectreRF | APS | AMS (+ APS) | VHDL |
| Simulink | AFS (BDA) | AFS (BDA) | AMS (+ Ultrasim) | System-Verilog |
| Matlab | APS | System-C | ||
| PSL/CPF/UPF |
- State-of-the-art simulators for analog, digital and mixed-signal ICs (see above). ICsense has developed methodologies to have fast and accurate full chip-level mixed-signal simulation coverage with these simulators.
- Cadence - Virtuoso for schematic entry and layout
- Industry-standard digital tool flow enhanced with in-house tools: simulation, synthesis, logic equivalence checking, STA, formal verification, place-and-route and ATPG test pattern generation
- Mentor Calibre for physical Verification (DRC/LVS) and parasitic extraction (xRC)
- Cliosoft for version control of the schematics, layout and testbench files
- Matlab (including custom toolboxes) and Simulink for concept definitions and system design
- Matlab script-based interface to formalize and automate circuit sizing, test-bench and simulation control, simulation data post-processing and report generation
Structured design methodology
Key benefits:
- Structured and formalized design approach using design plans
- Traceability of design choices and trade-offs through version control and design plans
- Design and layout integrity through version control (Cliosoft)
- Quality of final design and layout by formal issue management (JIRA)
- Reliability of results by semi-automated simulation coverage and reporting
- Extensive digital simulation coverage and constraint randomized verification
Key Features:
- Top-down, bottom-up design methodology
- Automated characterization over corners, supply and temperature
- Powerful simulation result and corner data processing
- Technology-independent platform
- Simulator-independent platform
- Embeds design plans for most analog blocks e.g. amplifier topologies, low dropout regulators, oscillators, bandgap references, temperature sensors, ...
- Code, condition, functional and assertion coverage in digital simulation
- Version control (Cliosoft)
- Issue management (JIRA)
Proprietary design toolboxes
- DC-DC converters (inductive and capacitive / buck, boost, buck-boost, flyback)
- Delta-sigma analog-to-digital converters
- SAR analog-to-digital converters
- Pipelined analog-to-digital converters
- Delta-Sigma fractional-N synthesizers
- Digital-to-analog converters
- Phase-locked loops (PLL)
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