The job location can be Leuven or Ghent.
The junior IC Layout Engineer is responsible for converting an electrical design to a mask layout used for chip fabrication. He is responsible for the physical representation of dedicated blocks of the chip. This will be done in close collaboration with the circuit designers and senior layout engineers.
Responsibilities
- Layout of integrated circuits in Cadence Virtuoso and final verification (LVS, DRC) in Mentor Calibre following the internal design rules and quality regulations of ICsense
- Work according to project planning, provide feedback concerning layout planning to the project leader and organize own work
- Write documentation
- Attend review- and project meetings
Competences
- You have a bachelor degree in electronics or a master degree in industrial sciences (electronics)
- Some experience with CAD tools or in IC layout is considered as a plus
- You have good geometrical insight
- You communicate fluently in English (oral and written)
- You are a true team player, trustworthy and reliable, you will work in close collaboration with the IC layout and design team
- You have a passion for technology and you are eager to learn new things
- You are a professional who can deliver high-quality work on tight schedules
- You demonstrate creative, critical and independent thinking capabilities
- You have good planning and organizational skills
Our offer
- The job location can be Leuven or Ghent
- An attractive salary package with a variety of extra benefits
- A stimulating and pleasant working environment with regular team activities
- A financially healthy company with growth potential
- Possibility to continuously learn and grow through in-house and external trainings
